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| PRELIMINARY DATA SHEET SKY73103: 1460-1665 MHz High Performance VCO/Synthesizer With Integrated Switch Applications * 2G, 2.5G, and 3G base station transceivers: - GSM, EDGE, CDMA, WCDMA * General purpose RF systems Description Skyworks SKY73103 Voltage-Controlled Oscillator (VCO)/Synthesizer is a fully integrated, high performance signal source for high dynamic range transceivers. The device provides ultra-fine frequency resolution, fast switching speed, and low phase noise performance for 2G, 2.5G, and 3G base station transceivers. The SKY73103 VCO/Synthesizer is a key building block for highperformance radio system designs that require low power and a fine step size. Reference clock generators with an output frequency up to 52 MHz can be used with the SKY73103. The input clock frequency is divided down by programmable dividers (1 to 8) for the synthesizer. The phase detector can operate at a maximum speed of 26 MHz, which allows better phase noise due to the lower division value. The SKY73103 VCO/Synthesizer is provided in a compact, 38-pin Multi-Chip Module (MCM). The device package and pinout are shown in Figure 1. A functional block diagram is shown in Figure 2. Signal pin assignments and functional pin descriptions are provided in Table 1. Features * Wideband frequency operation: 1460 to 1665 MHz * Process-tolerant compensation for VCO * 24-bit fractional-N synthesizer * Ultra-fine frequency resolution of 0.001 ppm * Flexible reference frequency selection * Three-wire serial interface up to 20 MHz clock frequency * Integrated PLL supply regulation for spur isolation * MCM (38-pin, 9 x 12 mm) Pb-free free (MSL3, 260 C per JEDEC J-STD-020) SMT package Skyworks offers lead (Pb)-free, RoHS (Restriction of Hazardous Substances) compliant packaging. GND GND GND GND GND GND 31 38 37 36 35 34 33 32 30 29 28 27 26 25 24 23 22 21 20 GND GND GND SW_EN GND GND GND GND GND RF_OUT 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 GND VDD N/C GND GND N/C GND GND GND FREF LD N/C GND 19 GND GND GND N/C GND GND CLK DATA LE S958 Figure 1. SKY73103 Pinout- 38-Pin MCM Package (Top View) Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 1 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Varactor Vtune Lr Cal Lr 2 2 2 Buffer VCO Out + VCO Out - Z = 1:4 RF Output SW_EN SR Out + 7 2 SR Out - Vtune cap [6:0] Flag PLL Low Pass Filter 3-Wire Serial Interface CLK LE DAT R1 SP1 SC1 CPO RF FREF R1 Divider RF PFD RF Charge Pump N PS RFIN 7 Mux (LD/Test) N Divider FN ME Divide-by-2 P/P+1 Prescaler RFINB LD Modulator Digital Coarse Calibration cap [6:0] 7 Calibration Complete S1040 Figure 2. SKY73103 Functional Block Diagram Table 1. SKY73103 Signal Descriptions Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 GND GND GND SW_EN GND GND GND GND GND RF_OUT GND GND GND N/C GND GND CLK DATA LE Name Ground Ground Ground Synthesizer RF output switch enable Ground Ground Ground Ground Ground Synthesizer output Ground Ground Ground No connection Ground Ground Serial port clock Serial port data Serial port latch enable Description Pin # 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 GND N/C LD FREF GND GND GND N/C GND GND GND GND GND N/C GND GND GND VDD GND Name Ground No connection Lock detect output Frequency reference input Ground Ground Ground No connection Ground Ground Ground Ground Ground No connection Ground Ground Ground +5 V power supply Ground Description Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 2 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Technical Description The SKY73103 is a fractional-N frequency synthesizer using a modulation technique. The fractional-N implementation provides low in-band noise by having a low division and fast frequency settling time. The device also provides programmable, arbitrary fine frequency resolution. This compensates the frequency synthesizer for crystal frequency drift. Serial I/O Control Interface The SKY73103 is programmed through a three-wire serial bus control interface. The three-wire interface consists of three signals: CLK (pin 17), LE (pin 19), and the bit serial data line DATA (pin 18). A serial data input timing diagram is shown in Figure 3. Timing parameter values are provided in Table 2. Figure 4 depicts the serial bus, which consists of one 26-bit load register and four separate 24-bit hold registers. Data is initially clocked into the load register starting with the Most Significant Bit (MSB) and ending with the Least Significant Bit (LSB). The LE signal is used to gate the clock to the load register, requiring the LE signal to be brought low before the data load. Data is shifted on the rising edge of CLK. The falling edge of LE latches the data into the appropriate hold register from the load register. This programming sequence must be repeated to fill all four hold registers. The specific hold register addresses are determined by the wd_0 and wd_1 parameters in the load register. These are the two LSBs (bits [1:0]) as shown in Figure 4. Table 3 lists the four hold registers and their respective addresses as determined in the load register. The contents of each word in the load register are used to program the four hold registers described in Tables 4 through 7. The dpll_ctrl parameter (bits [19:2] of Word 1) programs the Digital Phase Locked Loop (DPLL) block. Each of the 18 bits that comprise the dpll_ctrl parameter map directly to the signal ports on the DPLL block as shown in Table 8 (except for the dpll_flag_override and dpll_flag_value parameters). Loading new data into a hold register not associated with the synthesizer frequency programming does not reset or change the synthesizer. The synthesizer should not lose lock before, during, or after a new serial word load that does not change the programmed frequency. VCO Auto-Tuning Loop An auto-tuning loop provides the proper 7-bit coarse tuning setting for the switch capacitors in the VCO tank circuits. This sets the oscillation frequency as close to target as possible before starting fine analog tuning. The auto-tuning loop is designed to compensate for process variation so that the VCO fine tuning range can be reduced to cover minor variations only. The auto-tuning loop reduces VCO gain (KV), which reduces the VCO phase noise. The loop includes an analog part and a digital part (referred to as the DPLL). The analog part includes the VCO, a high-speed divider, and a VCO tuning voltage control block. The high-speed divider consists of the prescaler (divide by 16/17 or divide by 8/9) followed by an additional divide-by-2 block to generate the low frequency internal signal, vco_clk. There are two conditions that enable the VCO auto-tuning function: a Power-On-Reset (POR) and a change in frequency. The difference in the program flow under each of these conditions is illustrated in Figure 5. Under either condition, dpll_en (bit [20] of Word 1) should first be cleared so that a rising edge pulse can be generated. Following this pulse, set dpll_en to enable VCO autotuning. DATA tDHD tDSU CLK tCLE tLEC tLEW LE S1053 tCKH tCKL Figure 3. SKY73103 Serial Data Input Timing Diagram (MSB First) Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 3 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Table 2. CLK, DATA, LE Timing Parameters Parameter Input high voltage (VIH) Input low voltage (VIL) Input current (lDIG) Clock frequency Clock high (tCKH) Clock low (tCKL) Data set up (tDSU) Data hold (tDHD) Clock to latch enable (tCLE) Latch enable width (tLEW) Latch enable to clock (tLEC) Word length Number of words Current drain 1.6 V 0.3 V 1 A (maximum) 15 MHz (maximum) 15 ns (minimum) 15 ns (minimum) 20 ns (minimum) 10 ns (minimum) 20 ns (minimum) 15 ns (minimum) 15 ns (minimum) 26 bits 4 2 A Value Power-On Preset CLK DATA (Words 0-3, bits [25:0]) Load Register Bits [25:2] Operation Mode Register Latch Word 0 Bits [25:2] Auto Calibration Control Register Latch Word 1 Bits [25:2] Frequency Word 2 Bits [25:2] Control 1 Register Latch Frequency Control 2 Register Latch Word 3 Bits [25:2] Words 0-3 Bits [1:0] LE 2 LSB Decode (Register Address, Bits [1:0]) S918 Figure 4. Serial Bus Block Diagram Table 3. SKY73103 Hold Registers and Addresses Hold Register Name Operation Mode Auto Calibration Control Frequency Control 1 Frequency Control 2 Hold Register Address (Binary) in Load Register Words Bit [1] 0 0 1 1 Bit [0] 0 1 0 1 Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 4 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Table 4. Load Register Word 0 (Programs the Operation Mode Register) (1 of 2) Parameter Function State Description Recommended Operational Value (Binary) 00 Bits [4:2]: 0 0 0 = 200 A 0 0 1 = 400 A 0 1 0 = 600 A 0 1 1 = 800 A 1 0 0 = 1000 A 1 0 1 = 1200 A 1 1 0 = 1400 A 1 1 1 = 1600 A cp_delay Charge pump delay [6:5] Bits [6:5]: 0 0 = 2 nsec 0 1 = 4 nsec 1 0 = 7 nsec 1 1 = 9 nsec pd_polar Polarity of phase detector [7] Bit [7]: 0 = negative 1 = positive cp_tristate Tri-state selection for the transmit PLL charge pump output [8] Bit [8]: 0 = charge pump in normal functional mode 1 = charge pump disabled/tri-stated Reserved Bit [12] Bit [11] Bit [10]: N-Cntr/R-Divider Voltage 0 1 1 1 1 X 0 0 1 1 X 0 1 0 1 = = = = = 0V 1.8 V 1.8 V 2.4 V 2.4 V Mod Dig Voltage 0V 1.8 V 2.4 V 1.8 V 2.4 V - 0 100 0 0 Application dependent (see Table 11) wd_0, wd_1 cp_output Address bits [1:0]. Must be set to 00b (see Table 3) Charge pump setting [4:2] 00 rsvd sd_sel Reserved [9] Internal operating voltage control bit for synthesizer [10] Note: this bit needs to be programmed together with bits [11] and [12]. nr_sel Internal operating voltage control bit for Ncounter and R-divider [11] See sd_sel parameter (bit [10]) This bit needs to be programmed together with bits [10] and [12]. pll_en Internal operating voltage control bit for PLL [12] See sd_sel parameter (bit [10]) This bit needs to be programmed together with bits [10] and [11]. - ref_bw_sel Reference buffer bandwidth [14:13] Bits [14:13]: 0 0 = 20 MHz 0 1 = 30 MHz 1 0 = 40 MHz 1 1 = 50 MHz Application dependent (see Table 11) test_mux Lock detect and diagnostic output select [17:15] Bits [17:15]: 0 0 0 = lock detect output 0 0 1 = R-divider output 0 1 0 = N-divider output 0 1 1 = not used 1 0 0 = not used 1 0 1 = not used 1 1 0 = not used 1 1 1 = DPLL test 000 Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 5 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Table 4. Load Register Word 0 (Programs the Operation Mode Register) (2 of 2) Parameter Function State Description Recommended Operational Value (Binary) 000 00 rsvd pre_curr_sel Reserved [20:18] Prescaler current bias [22:21] Reserved Bits [22:21]: 0 0 = 20 A 0 1 = 22 A 1 0 = 24 A 1 1 = 26 A prescale_sel Prescaler mode select [23] Bit [23]: 0 = Prescaler in 8/9 divide mode 1 = Prescaler in 16/17 divide mode Application dependent (see Table 11) 00 rsvd Reserved [25:24] Reserved Table 5. Load Register Word 1 (Programs the Auto Calibration Control Register) Parameter Function State Description Recommended Operational Value (Binary) 01 Refer to Table 8 0 = disable VCO auto tuning 1 = enable VCO auto tuning Reserved - Refer to Figure 5 00000 wd_0, wd_1 dpll_ctrl dpll_en rsvd Address bits [1:0]. Must be set to 01b (see Table 3) DPLL control [19:2] VCO auto tuning enable flag [20] Reserved [25:21] Table 6. Load Register Word 2 (Programs the Frequency Control 1 Register) (1 of 2) Parameter Function State Description Recommended Operational Value (Binary) 10 Bits [3:2]: 00=8 01=4 10=2 11=1 rsvd ndiv Reserved [5:4] N-divider/prescaler mode for control of M and A counters [15:6] Reserved Bits [15:6]: Bits [15:10] M bits [5:0] M bits [5:0] Bits [9:6] A bits [3:0] = use 16/17 prescaler A bits [2:0] = use 8/9 prescaler Application dependent (see Table 11) wd_0, wd_1 rdiv Address bits [1:0]. Must be set to 10b (see Table 3) Reference divider ratio [3:2] - Application dependent Note: The six MSBs of ndiv denote the M counter value and the four LSBs denote the A counter value. For the 8/9 prescaler mode, the A counter value requires only three bits. Therefore, bit [9] of ndiv is a "don't care" bit. rsvd Reserved [16] Reserved 0 Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 6 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Table 6. Load Register Word 2 (Programs the Frequency Control 1 Register) (2 of 2) Parameter Function State Description Recommended Operational Value (Binary) 1 mod_reset_f Modulator reset/fractional mode select [17] Bit [17]: 0 = modulator is reset or disabled 1 = modulator is in fractional mode fract_int_sel Fractional/integer mode select [18] Bit [18]: 0 = modulator is in integer mode 1 = modulator is in functional mode 1 rsvd me Reserved [19] Modulus extender [23:20] Reserved. This bit should always remain set (logic high). These four bits need to be programmed together with bits [12:2] of Word 3. Bits [23:20] represent the four LSBs ([3:0]) of the 15-bit modulus extender value (ME [14:0]). Refer to the Synthesizer Programming section of this Data Sheet for further information. Reserved 1 Application dependent rsvd Reserved [25:24] 00 Table 7. Load Register Word 3 (Programs the Frequency Control 2 Register) Parameter Function State Description Recommended Operational Value (Binary) 11 These 11 bits need to be programmed together with bits [23:20] of Word 2. Bits [12:2] represent the 11 MSBs ([14:4]) of the 15-bit modulus extender value (ME [14:0]). Refer to the Synthesizer Programming section of this Data Sheet for further information. Bits [20:13] represent the 8-bit fractional divisor code (FN [7:0]). Refer to the Synthesizer Programming section of this Data Sheet for information. These three bits should always remain cleared (logic low). Reserved Application dependent wd_0, wd_1 me Address bits [1:0]. Must be set to 11b (see Table 3) Modulus extender [12:2] fn Fractional divisor code [20:13] Application dependent 0 00 rsvd rsvd Reserved [23:21] Reserved [25:24] Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 7 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Table 8. DPLL Signal Mapping Serial Port Name dpll_clk_dly(0) dpll_clk_dly(1) dpll_temp_comp(0) dpll_temp_comp(1) dpll_temp_comp(2) dpll_temp_comp(3) dpll_temp_comp(4) dpll_temp_comp_en dpll_ext_test(0) dpll_ext_test(1) dpll_ext_test(2) dpll_ext_test(3) dpll_ext_test(4) dpll_ext_test(5) dpll_ext_test(6) dpll_ext_test(7) dpll_flag_override dpll_flag_value dpll_en Load Register Word 1 Bit 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 DPLL Signal Port Name clk_dly(0) clk_dly(1) temp_comp_val(0) temp_comp_val(1) temp_comp_val(2) temp_comp_val(3) temp_comp_val(4) temp_comp_en ext_test(0) ext_test(1) ext_test(2) ext_test(3) ext_test(4) ext_test(5) ext_test(6) ext_test(7) N/A N/A cal_en VCO Prescalers The VCO prescalers divide the VCO output signal by either 16/17 or 8/9. The modulator determines whether to divide by 16 or 17 in the 16/17 mode, or whether to divide by 8 or 9 in the 8/9 mode. The prescaler mode is determined by bit [23] of Word 0 (Operation Mode Register). N-Counter The N-counter consists of two asynchronous ripple counters, a 6bit M-counter and a 4-bit A-counter. The M-counter determines the counts using the lower division ratio in the prescaler (8 or 16); the A-counter determines the counts using the upper division ratio (9 or 17). By changing the counter setting at each reference clock cycle, the Modulated Fractional Divider (MFD) achieves the desired noise shaping. VCO MFD Block The MFD block divides down the prescaler output to the internal PLL comparison frequency. A third order cascaded modulation technique minimizes spurs through randomization of the division ratio. The MFD block controls the division ratio by dynamically programming the M and A counters. Phase Detector and Charge Pump The phase detector and charge pump detect and integrate the phase and frequency errors of the divided-down VCO output versus the reference clock. This results in a feedback adjustment of the control voltage for the VCO. Lock Detect Lock detection circuitry provides a CMOS logic level indication when the PLL is frequency locked (high when locked). Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 8 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER DC Power On Frequency Change Hardware Auto Reset Clear dpll_en (Word 1, Bit [20]) Clear dpll_en (Word 1, Bit [20]) Send Only Changed Words Send Word 0, 1, 2, and 3 Set dpll_en (Word 1, Bit [20]) Set dpll_en (Word 1, Bit [20]) Send Word 1 Send Word 1 Lock on New Frequency Lock on New Frequency S998 Figure 5. VCO Auto-Tuning Enable Process Flow Due to POR or Frequency Change Reference Input Divider The R-counter (reference input clock divider) consists of three divide-by-two blocks and one multiplexer controlled by the rdiv parameter in Word 2 (Frequency Control 1 Register). The Rcounter is used to select a divide-by-one or a divide-by-eight function. Synthesizer Output Switch An on-chip switch is integrated into the SKY73103 RF output after the balun and is controlled by the SW_EN signal (pin 4) as indicated below: SW_EN Input High Low Synthesizer Output On Off Synthesizer Programming To program the synthesizer to the correct frequency, values for the N-counter (both M and A portions), fractional divisor (FN), and fractional modulus extender (ME) are needed. These values are used to determine the total divider ratio, DTotal, according to Equation 1: DTotal = Nactual + FNactual + MEactual + 3.5 Where: Nactual = the actual value of the N-counter FNactual = the actual fractional divisor MEactual = the actual fractional modulus extender Because of the way the modulator is implemented in the SKY73103, the number 3.5 must be added to the division number to obtain the final division ratio. The calculated value for DTotal can then be used to determine the correct synthesizer frequency, RF: RF = FREF x DTotal R1 (1) The switch provides >50 dB isolation at the synthesizer RF output. This allows the SKY73103 to be used for GSM applications. (2) Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 9 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Where: FREF = the reference frequency R1 = the reference divider radio The 6-bit M-counter and the 4-bit A-counter portions of the Ncounter are calculated according to the following relationships: Nactual is the actual N-counter value and is the integer portion of (DTotal - 3.5): Nactual = Mactual x P + Aactual If: M = Mactual (binary number, fit to six bits) A = Aactual (binary number, fit to four bits) Then: N = M x 24 + A Where: N is the number to be programmed into the N-counter. The synthesizer has a selectable prescaler of 8/9 or 16/17. If the 16/17 prescaler is used: P = 24 = 16 In this case, N is the same as Nactual, M is equal to the six MSBs of Nactual, and A is equal to the four LSBs of Nactual. If the 8/9 prescaler is used: P=8 Here, N is not equal to Nactual. The A-counter portion only uses the three LSBs (the 4th bit of the A-counter is a "don't care" bit). The fractional divisor code (FN) sets the fractional-N modulo up to 256 modulo according to the following equation: 1 1 1 FN actual = D7 + D6 2 + D5 3 + 2 2 2 *** Restating Equation 2 as a function of DTotal: DTotal = (2640.45 x 2)/16 = 330.05625 Where: RF = 2640.45 R1 = 2 FREF = 16 (3) Determine Nactual by subtracting 3.5 from DTotal and removing the fractional portion: DTotal - 3.5 = 326.55625 Using Equation 3: Nactual = 326 = Mactual x P + Aactual Where: Mactual = 20 P = 16 Aactual = 6 M = Mactual = 20 = 010100b (the six MSBs) A = Aactual = 6 = 0110b (the four LSBs) N = M x 24 + A = 0101000110b (this is the same as Nactual) Multiply the fractional portion that was removed in the previous step by 256 and remove the fractional portion of the result to determine FN: 0.55625 x 256 = 142.4 FN = 142 = 10001110b Divide FN by 256 to determine the actual fractional part, FNactual: FNactual = 142/256 = 0.5546875 Subtract this result from the fractional portion of (DTotal - 3.5) to determine the actual fractional modulus extender, MEactual: MEactual = (DTotal - 3.5 - Nactual) - FNactual = 0.55625 - 0.5546875 = 0.0015625 Multiply this result by 8388608 (the 23-bit modulator value, 223) and remove the fractional portion to determine the value of ME: 0.0015625 x 8388608 = 13107.2 ME = 13107 = 011001100110011b Example 2: A desired synthesizer frequency of 725 MHz is required using a crystal frequency of 13 MHz and an 8/9 prescaler. Since the maximum internal reference frequency is 25 MHz, the crystal frequency does not need to be divided. However, a reference divider ratio of 2 is used for this example. 1 + D0 8 2 (4) The value of FN is equal to the binary representation of 256 (or 28) x FNactual, or: FN = D7 x 27 + D6 x 26 + D5 x 25+ . . . D0 The fractional modulo can be extended up to 223 using the modulo extender (ME) if required: MEactual = D14(1/29) + D13(1/210) + D12(1/211) + . . . + D0(1/223) The value of ME is equal to the binary representation of the integer part of 223 x MEactual, or: ME = D14 x 2 + D13 x 2 + D12 x 2 + . . .D0 14 13 12 Example 1: A desired synthesizer frequency of 2640.45 MHz is required using a crystal frequency of 16 MHz and a 16/17 prescaler. Since the maximum internal reference frequency is 25 MHz, the crystal frequency does not need to be divided. However, a reference divider ratio of 2 is used for this example. Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 10 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Restating Equation 2 as a function of DTotal: DTotal = (725 x 2)/13 = 111.538461538 Where: RF = 725 R1 = 2 FREF = 13 Determine Nactual by subtracting 3.5 from DTotal and removing the fractional portion: DTotal - 3.5 = 108.038461538 Using Equation 3: Nactual = 108 = Mactual x P + Aactual Where: Mactual = 13 P=8 Aactual = 4 M = Mactual = 13 = 001101b (the six MSBs) A = Aactual = 4 = 0100b (the four LSBs) N = M x 24 + A = 0011010100b (the value programmed) Multiply the fractional portion that was removed in the previous step by 256 and remove the fractional portion of the result to determine FN: 0.038461538 x 256 = 9.846153728 FN = 9 = 00001001b Divide FN by 256 to determine the actual fractional part, FNactual: FNactual = 9/256 = 0.03515625 Subtract this result from the fractional portion of (DTotal - 3.5) to determine the actual fractional modulus extender, MEactual: MEactual = (DTotal - 3.5 - Nactual) - FNactual = 0.038461538 - 0.03515625 = 0.003305288 Multiply this result by 8388608 (the 23-bit modulator value, 223) and remove the fractional portion to determine the value of ME: 0. 003305288 x 8388608 = 27726.7653 ME = 27726 = 110110001001110b Package and Handling Information Since the device package is sensitive to moisture absorption, it is baked and vacuum packed before shipping. Instructions on the shipping container label regarding exposure to moisture after the container seal is broken must be followed. Otherwise, problems related to moisture absorption may occur when the part is subjected to high temperature during solder assembly. The SKY73103 is rated to Moisture Sensitivity Level 3 (MSL3) at 260 C. It can be used for lead or lead-free soldering. For additional information, refer to Skyworks Application Note, PCB Design and SMT Assembly/Rework Guidelines for MCM-L Packages, document number 101752. Care must be taken when attaching this product, whether it is done manually or in a production solder reflow environment. Production quantities of this product are shipped in a standard tape and reel format. For packaging details, refer to the Skyworks Application Note, Tape and Reel, document number 101568. Circuit Design Considerations The following design considerations are general in nature and must be followed regardless of final use or configuration 1. Paths to ground should be made as short and as low impedance as possible. 2. The ground pad of the SKY73103 provides critical electrical grounding requirements. Design the connection to the ground pad to provide the best electrical connection to the circuit board. Multiple vias to the grounding layer are recommended to connect the top layer ground area to the main ground layer. 3. Skyworks recommends including external bypass capacitors on the VDD voltage input (pin 37) of the device. These capacitors should be placed as close as possible to the VDD input pin. 4. A 50 impedance trace is needed for the RF_OUT (pin 10) line. Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 11 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Electrical and Mechanical Specifications The absolute maximum ratings of the SKY73103 are provided in Table 9. The recommended operating conditions are specified in Table 10 and electrical specifications are provided in Table 11. Spur suppression measurements are provided in Table 12. Measurement plots for single sideband phase noise and settling time are shown in Figures 6 and 7, respectively. A typical application schematic for the SKY73103 is provided in Figure 8. Figure 9 shows the package dimensions for the 38-pin MCM and Figure 10 provides the tape and reel dimensions. Electrostatic Discharge (ESD) Sensitivity The SKY73103 ESD threshold level is 2500 VDC using Human Body Model (HBM) testing. This level applies to RF signal lines >100 MHz, analog and RF lines <100 MHz, digital lines, power supply lines, and ground pins. To avoid latent or visible ESD damage, always follow proper ESD handling precautions. Table 9. SKY73103 Absolute Maximum Ratings (Note 1) Parameter Supply voltage Operating temperature, full performance Storage temperature VCC TOP TST Symbol Min 0 -40 -40 Typical Max 5.5 +85 +150 Units V C C Note 1: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with only one parameter set at the limit and all other parameters set at or below their nominal values. Table 10. SKY73103 Recommended Operating Conditions Parameter Supply voltage Input voltage (CLK, DATA, LE): Low level High level Output voltage (LD) with 18 k load from VCC PLL: Low level, unlocked High level, unlocked Reference frequency input voltage (FREF, pin 23) Load connected to RF output RF output switch enable: High Low SWENH SWENL 2.2 0.8 FREFIN VCC Symbol Min 4.75 Typical 5.00 Max 5.25 0.6 1.4 Units V V V 0.4 2.4 0.5 1.0 1.5 V V Vp-p 50 , maximum VSWR (load input) 2.0:1, all phases V V Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 12 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Table 11. SKY73103 Electrical Characteristics (Note 1) (VCC = 5 V, TC = 25 C, cp_output = 1000 A, FREF = 52 MHz, ref_bw_sel = 50 MHz, rdiv = 8, prescale_sel = 8/9, Unless Otherwise Noted) Parameter Oscillation frequency Reference frequency Phase detector frequency PLL loop bandwidth Output level Output impedance Output VSWR Reference frequency (FREF) input impedance Harmonic suppression Integrated phase noise Single sideband phase noise offset: @ 1 kHz @ 5 kHz @ 10 kHz @ 200 kHz @ 400 kHz @ 600 kHz @ 800 kHz @ 1.8 MHz @6 MHz PLL-reference spurious suppression Frequency settling time Phase settling time Peak phase error Current consumption 120 Within 2 kHz Within 5 deg 250 300 530 5 100 Hz to 100 kHz -86 -87 -86 -121 -135 -141 -144 -151 -162 -100 470 -20 1 FREF Symbol Test Conditions Min 1460 13 6.5 25 0 50 *** TBD *** Typical Max 1665 52 Units MHz MHz MHz kHz dBm - dBc degrees RMS dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc s s degrees mA Note 1: Characterized performance may change if the SKY73103 is configured differently than the test conditions specified here. This characterization used a 6.5 MHz fixed comparison frequency for the PLL phase loop filter. The PLL synthesizer is programmable up to a maximum comparison frequency of 26 MHz but with degraded performance. Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 13 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER -60 -70 -80 -90 -100 1461 MHz 1600 MHz 1662 MHz Phase Noise (dBc/Hz) -110 -120 -130 -140 -150 -160 -170 -180 0.1 1 10 100 1000 10000 S1000 Offset Frequency (kHz) Figure 6. SKY73103 Single Sideband Phase Noise Measurements Table 12. SKY73103 Spur Suppression Measurements (VCC = 5 V, TC = 25 C, cp_output = 1000 A, FREF = 52 MHz, rdiv = 8) Spurious Power (kHz) 1461 1499 No spur No spur No spur No spur No spur 2355.55 kHz, -103 dBc 2866.58 kHz, -101 dBc Frequency (MHz) 1537 No spur No spur No spur No spur No spur No spur 1600 No spur No spur No spur No spur No spur 2272.95 kHz, -103 dBc 1631 No spur No spur 498.51 kHz, -97 dBc No spur No spur No spur 1662 No spur No spur No spur No spur No spur No spur 1 200 400 600 800 1000 No spur No spur No spur No spur No spur 2232.74 kHz, -100 dBc 3000 No spur No spur 3551.30 kHz, -105 dBc 4478.81 kHz, -107 dBc 3306.59 kHz, -106 dBc 5074.89 kHz, -102 dBc Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 14 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER 20 15 1461 MHz 1600 MHz 1662 MHz 10 Relative Phase (deg) 5 0 -5 -10 -15 -20 0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50 S1001 Time (msec) Figure 7. SKY73103 Settling Time Measurements +5 V From Regulator C1 10 F + C2 10 nF x 38 37 36 35 34 33 32 31 30 VDD GND GND GND GND N/C GND GND GND 29 1 2 3 GND GND GND SW_EN GND GND GND GND GND RF_OUT SKY73103 GND 28 GND 27 N/C 26 x RF Output Switch Control 4 5 6 7 8 9 GND 25 GND 24 GND 23 FREF 22 LD 21 Frequency Reference Lock Detect x N/C 20 DATA 18 GND GND GND GND GND CLK N/C (50 Controlled Impedance Line) RF Output 10 GND 11 12 13 14 x 15 16 17 19 LE Latch Enable Data Clock S962 Figure 8. SKY73103 Typical Application Schematic Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 15 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER 24X 4.4 4X 3 4X 2 4X 1 2X 1.75 38X SMT Pad 0.1 A B C Pin 1 Indicator 9 B C Pin 38 18X 5.9 4X 4.5 4X 3.5 4X 2.5 4X 1.5 4X 0.5 12 C Pin 1 Indicator See Detail D Pin 1 A 0 2X 1.25 See Detail E 2X 3.75 8X Solder Mask Openings 0.2 A B C B A 1.75 0.1 0.15 A B C 0.1 0 Top View 0.5 0.1 (0.1) Side View 2X (0.1) 0.65 0.1 Bottom View Metal Pad Edge 0.5 0.05 Metal Pad Edge Solder Mask Edges 0.5 0.1 2X (0.1) Metal Pad Edge 0.65 0.1 0.5 0.1 Detail A 3.375 0.2 x 0.2 Detail B 3.375 Detail C 2.375 Solder Mask Edges 2.375 Solder Mask Edges All measurements are in millimeters. Dimensioning and tolerancing according to ASME Y14.5M-1994. Detail D Detail E S960 Figure 9. SKY73103 38-Pin MCM Package Dimensions Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 16 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER 1.55 0.05 0.30 0.05 Pin #1 indicator 12.00 4.00 2.00 0.05 1.75 0.10 12.30 B 1.80 1.50 Min. B Notes: 1. Carrier tape material: black conductive polystyrene 2. Cover tape material: transparent conductive PSA 3. Cover tape size: 21.3 mm width 4. All measurements are in millimeters 9.35 A Figure 10. SKY73103 Tape and Reel Dimensions Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 200649B * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * July 19, 2007 24.00 0.30 S961 A A 11.50 0.05 B 17 PRELIMINARY DATA SHEET * SKY73103 VCO/SYNTHESIZER Ordering Information Model Name SKY73103 1460-1665 MHz VCO/Synthesizer Manufacturing Part Number SKY73103-11 (Pb-free package) Evaluation Kit Part Number Copyright (c) 2007, Skyworks Solutions, Inc. All Rights Reserved. Information in this document is provided in connection with Skyworks Solutions, Inc. ("Skyworks") products or services. These materials, including the information contained herein, are provided by Skyworks as a service to its customers and may be used for informational purposes only by the customer. Skyworks assumes no responsibility for errors or omissions in these materials or the information contained herein. Skyworks may change its documentation, products, services, specifications or product descriptions at any time, without notice. Skyworks makes no commitment to update the materials or information and shall have no responsibility whatsoever for conflicts, incompatibilities, or other difficulties arising from any future changes. No license, whether express, implied, by estoppel or otherwise, is granted to any intellectual property rights by this document. Skyworks assumes no liability for any materials, products or information provided hereunder, including the sale, distribution, reproduction or use of Skyworks products, information or materials, except as may be provided in Skyworks Terms and Conditions of Sale. THE MATERIALS, PRODUCTS AND INFORMATION ARE PROVIDED "AS IS" WITHOUT WARRANTY OF ANY KIND, WHETHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, INCLUDING FITNESS FOR A PARTICULAR PURPOSE OR USE, MERCHANTABILITY, PERFORMANCE, QUALITY OR NON-INFRINGEMENT OF ANY INTELLECTUAL PROPERTY RIGHT; ALL SUCH WARRANTIES ARE HEREBY EXPRESSLY DISCLAIMED. SKYWORKS DOES NOT WARRANT THE ACCURACY OR COMPLETENESS OF THE INFORMATION, TEXT, GRAPHICS OR OTHER ITEMS CONTAINED WITHIN THESE MATERIALS. SKYWORKS SHALL NOT BE LIABLE FOR ANY DAMAGES, INCLUDING BUT NOT LIMITED TO ANY SPECIAL, INDIRECT, INCIDENTAL, STATUTORY, OR CONSEQUENTIAL DAMAGES, INCLUDING WITHOUT LIMITATION, LOST REVENUES OR LOST PROFITS THAT MAY RESULT FROM THE USE OF THE MATERIALS OR INFORMATION, WHETHER OR NOT THE RECIPIENT OF MATERIALS HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. Skyworks products are not intended for use in medical, lifesaving or life-sustaining applications, or other equipment in which the failure of the Skyworks products could lead to personal injury, death, physical or environmental damage. Skyworks customers using or selling Skyworks products for use in such applications do so at their own risk and agree to fully indemnify Skyworks for any damages resulting from such improper use or sale. Customers are responsible for their products and applications using Skyworks products, which may deviate from published specifications as a result of design defects, errors, or operation of products outside of published parameters or design specifications. Customers should include design and operating safeguards to minimize these and other risks. Skyworks assumes no liability for applications assistance, customer product design, or damage to any equipment resulting from the use of Skyworks products outside of stated published specifications or parameters. Skyworks, the Skyworks symbol, and "Breakthrough Simplicity" are trademarks or registered trademarks of Skyworks Solutions, Inc., in the United States and other countries. Third-party brands and names are for identification purposes only, and are the property of their respective owners. Additional information, including relevant terms and conditions, posted at www.skyworksinc.com, are incorporated by reference. Skyworks Solutions, Inc. * Phone [781] 376-3000 * Fax [781] 376-3100 * sales@skyworksinc.com * www.skyworksinc.com 18 July 19, 2007 * Skyworks Proprietary and Confidential Information * Products and Product Information are Subject to Change Without Notice * 200649B |
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